Product Engineer, Simulation and Mixed-Signal Verification

We are seeking an experienced Product Engineer to drive customer success and adoption of advanced simulation and verification solutions. The role involves partnering with leading semiconductor companies to deploy scalable simulation methodologies, resolve complex verification challenges, influence product direction, and enable robust verification signoff for advanced SoC and IP designs.

The ideal candidate combines deep expertise in digital simulation and verification methodologies with strong customer-facing skills. Experience in analog mixed-signal (AMS) simulation and verification is also valuable for supporting increasingly heterogeneous SoC designs.

Key Responsibilities

• Lead technical engagements with strategic customers adopting simulation and verification solutions for complex SoCs and IPs.
• Act as the primary technical interface for simulation methodologies, helping customers achieve efficient and scalable verification.
• Drive resolution of challenging customer issues involving RTL and gate-level simulation, testbench integration, performance, capacity, debug, coverage, and verification signoff.
• Enable advanced simulation flows across block, subsystem, and full-chip verification environments.
• Help customers optimize simulation performance, regression throughput, compilation and elaboration flows, testbench architecture, and debug productivity.
• Analyze complex verification failures and identify root causes across RTL, testbenches, assertions, models, tool configuration, and verification infrastructure.
• Develop scalable solutions spanning simulation, assertions, coverage, debug, automation, and regression management.
• Support verification of analog mixed-signal functionality where required, including mixed-signal co-simulation, behavioral and real-number modeling, and digital–analog interface verification.
• Collaborate closely with Product Management and R&D to define requirements, prioritize enhancements, and influence the evolution of simulation solutions.
• Develop and promote best-practice simulation and verification methodologies for modern SoC architectures.
• Deliver technical presentations, training, workshops, and methodology sessions for customers and internal engineering teams.
• Create technical collateral, including application notes, reference flows, best-practice guides, and deployment methodologies.
• Mentor engineers and provide technical leadership for simulation and verification initiatives.
• Required Qualifications
• BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline with 5 to 15 years of relevant experience
• Significant experience in Product Engineering, Applications Engineering, Functional Verification, ASIC/SoC Verification, or Simulation Technologies.
• Strong expertise in:
• RTL and gate-level simulation
• SystemVerilog and UVM
• Assertions, including SVA
• Coverage-driven verification
• Simulation compilation, elaboration, execution, and debug
• Verification testbench architecture and integration
• Regression automation and failure triage
• Simulation performance and capacity optimization
• Strong understanding of:
• Event-driven simulation and scheduling semantics
• X-propagation and initialization behavior
• Timing simulation, SDF annotation, and timing checks
• Testbench–design interactions
• Assertions, functional coverage, and code coverage
• Debugging race conditions, non-determinism, and simulation mismatches
• Experience debugging complex SoC verification environments and identifying root causes across design, verification, models, and simulation infrastructure.
• Strong customer engagement, presentation, problem-solving, and communication skills.

Preferred Qualifications

• Hands-on experience with industry-standard simulation, debug, coverage, and regression technologies.
• Experience with analog mixed-signal verification, including:
• Digital–analog co-simulation
• Behavioral and real-number modeling
• Verilog-AMS or equivalent mixed-signal modeling languages
• AMS testbench integration and debug
• Accuracy, performance, and convergence trade-offs
• Experience with emulation, prototyping, formal verification, or hardware-assisted verification.
• Familiarity with software-driven and system-level verification methodologies.
• Experience integrating simulation into CI/CD and distributed regression environments.
• Knowledge of modern SoC architectures used in AI, mobile, automotive, networking, or high-performance computing applications.
• Experience working with Product Management and R&D to drive product enhancements and roadmap development.
• Exposure to multi-vendor verification environments and cross-tool workflows.
• Proven track record of leading customer escalations and driving successful technology adoption.