Associate III - VLSI

Role Description

Who we are

At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .

Summary

UST is looking for an Analog Layout Engineer with strong expertise in FinFET-based analog/IO layout design and sign-off verification.

The Opportunity

We are looking for a skilled Analog Layout Engineer to drive the physical implementation of high-performance analog and IO circuits in advanced process technologies. This role requires hands-on experience in critical analog block layouts, deep understanding of layout-dependent effects, and ownership of layout execution from floorplanning through sign-off.

Key Responsibilities

• Design and implement high-quality layouts for critical analog and IO blocks such as LDOs, Bandgaps, Oscillators, and related circuits
• Perform full-custom analog layout development in advanced FinFET technologies
• Execute top-level floorplanning and hierarchical layout integration methodologies
• Ensure layout quality through DRC, LVS, Antenna, ERC, PERC, and other physical verification checks using Calibre tools
• Perform parasitic extraction and analysis using StarRC and support post-layout optimization
• Analyze and mitigate EMIR and self-heating effects to ensure robust silicon performance
• Apply layout best practices for matching, electromigration (EM), ESD protection, latch-up prevention, coupling, and crosstalk mitigation
• Collaborate closely with analog designers to understand circuit requirements and optimize layout implementation
• Drive layout reviews, sign-off activities, and design quality improvements
• Support tape-out activities and resolve physical design issues across the project lifecycle
• Required Qualifications
• Bachelor's or Master's degree in Electronics & Communication Engineering, Electrical Engineering, or related field
• 4-8 years of hands-on experience in Analog/IO Layout Design
• Proven experience in layout design of critical analog blocks such as LDOs, Bandgaps, Oscillators, and similar circuits
• Strong experience with advanced FinFET technologies
• Expertise in Totem EMIR analysis and self-heating effect evaluation
• Strong knowledge of StarRC extraction and Calibre physical verification tools (DRC, LVS, Antenna, ERC, PERC, etc.)
• Good understanding of analog layout fundamentals including matching, EM, ESD, latch-up, coupling, and crosstalk considerations
• Strong understanding of analog circuit design concepts and layout-circuit interactions
• Experience with top-level floorplanning and hierarchical layout methodologies
• Excellent verbal and written communication skills
• Candidate should be currently employed and on an organization's payroll.

Preferred Qualifications

• Experience with Samsung Foundry process technologies
• Experience working on complex mixed-signal or high-performance SoC designs
• Knowledge of advanced reliability and manufacturability considerations in FinFET technologies
• Exposure to tape-out cycles in advanced technology nodes
• Strong collaboration skills with cross-functional design and verification teams

What We Believe

We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone, to champion diversity and inclusion and to place people at the centre of everything we do.

Humility

We will listen, learn, be empathetic and help selflessly in our interactions with everyone.

Humanity

Through business, we will better the lives of those less fortunate than ourselves.

Integrity

We honour our commitments and act with responsibility in all our relationships.

Equal Employment Opportunity Statement

UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation.

All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law.

UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.

• To support and promote the values of UST.
• Comply with all Company policies and procedures

Skills

Analog Layout, FinFET, LDO, Signal Integrity